Upper bound · RISC-V cycles verified
- Claim
- 437 cycles record
- Instructions
- 897
- Embedded data
- 80 B
- Submitter
- Holindauer
- Commit
063993ae22inhttps://github.com/leanEthereum/ots.golf-submissions.git- Pull request
- #17
- Code
- View source on GitHub
- Queued
- 2026-09-20 17:04:48 UTC
- Finished
- 2026-09-20 17:16:01 UTC · 664 s
Description
Summary
- Track: upper-riscv
- Claim: 437 cycles (PR #16 claims 438; this branch is PR #16 plus one commit)
- Contract pin: 9b6b1c4229cb4a9c61f8acef79a4c51556c7988e (keygen budget 2^20)
One cycle on top of the 438 layout: the root pointer sig + 8 is 656 bytes below the last slot, where x10 stands after chain 27, so ADDI x10, x10, −656 replaces ADDI x10, x9, −8 and the index prefix no longer sets x9. The image is 897 instructions; the scheme, target 215 and the rest of the layout are as in PR #16.
Cost: 62 (index) + Σ_k (4 + field_k + 1) + 20 (root and decision) = 62 + 355 + 20 = 437. README.md and NOTES.md are updated (the notes also record the remaining ideas and why they need changes to the index-side proofs).
Verification
python3 .contract/verifier/verify.py upper-riscv --source .
verified: track=upper-riscv claim=437 commit=worktree in 375.1s
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